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CONTACT: 9600541414
|
ADMISSION: +91 98947 01234
|
PLACEMENT: +91 98947 90284, 86084 85944
|
Email:
[email protected]
CONTACT: 9600541414
|
ADMISSION: +91 98947 01234
PLACEMENT: +91 98947 90284
|
Email:
[email protected]
CONTACT: 9600541414
ADMISSION: +91 98947 01234
PLACEMENT: +91 98947 90284, 86084 85944
Email:
[email protected]
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MENU
HOME
ABOUT US
About KIOT
Administration
Promoters’ Profile
Secretary’s Message
Principal’s Message
Governing Council
Academic Heads
Organisational Structure
Road Map, Vision & Mission
Core Values
Code of Conduct
Collaborations
Memorandum of Understandings
Awards & Recognitions
KIOT Awards
Anna University Rank Holders
Institution Policy
E-Brochure
E-Newsletter
ACADEMICS
Departments
UG
B.E. Mechanical Engineering
B.E. Electronics and Communication Engineering
B.E. Electrical and Electronics Engineering
B.E. Computer Science and Engineering
B.E. Civil Engineering
B.Tech Information Technology
B.Tech Computer Science and Business Systems
B.Tech Artificial Intelligence and Data Science
PG
M.E. Industrial Safety Engineering
M.E. VLSI Design
M.E. Computer Science and Engineering
M.E. Embedded System Technologies
Master of Business Administration (MBA)
Ph.D Programmes
Professional Code
Admission
Courses & Intake
Admission Norms
Scholarships
Tuition Fee for B.E. / M.E. / MBA
Cutoff Details
Academic Calendar
TRAINING & PLACEMENT
Centre for Placement and Industry Institution Interaction
Placement Team
Placement Details
Industry Connect
Placement Statistics
Placement Day Gallery
Pooled Off Campus Drive
Placement Drive Gallery
CoEs and ILL
Centre for Career Development and Traning (C-CDT)
Training Team
Student Training
Training – Online Assessment
Centre for Foreign Languages
Capability Enhancement Schemes
Competitive Exams
Internship
Our Recruiters
Why Recruit @ KIOT
Placement Contact
INCUBATION AND STARTUP CELL
AICTE IDEA LAB
RESEARCH
Departmentwise Research Initiatives
Publication List (SCI/Scopus Indexed)
Conference Publications (National/International)
Grants Received
Code of Ethics for Research
CLUBS & FORUMS
FACILITIES
Campus Facilities
Infrastructure
Differently Abled (Divyanjgan) Friendliness
ATM
Insurance
Alternate Energy Initiatives
Waste Management
Rain Water Harvesting
Media Centre
Classrooms
ICT Enabled Classroom and Seminar Hall
Smart Classroom
Internet & Computing Facilities
Library
Mentor – Mentee System
KIOT- Business Incubator
Sports & Games
Transport
Maintenance of Common Utilities & Labs
E-Governance
Other Amenities
ACCREDITATION
NAAC
NBA
IQAC
Members of Internal Quality Assurance Cell (IQAC)
IQAC Minutes of Meeting
Annual Quality Assurance Report (AQAR)
NIRF Reports
QUALITY INITIATIVES BY IQAC
ACADEMIC AND ADMINISTRATIVE AUDIT(AAA)
LOCATIONAL ADVANTAGES AND DISADVANTAGES
IPR AND INDUSTRY ACADEMIA INNOVATIVE PRACTICES
Student Satisfaction Survey
AUTONOMOUS
Academics – CDDA
Controller of Examination
Exam Results
Exam Section
ALUMNI
About Alumni Association
Office Bearers
Alumni Portal
Alumni Statistics
Proud Alumni
Voices of Alumni
Alumni Testimonials
Alumni Registration
OUTREACH
ARIIA
KIOT-ISP
CONTACT US
Contacts
Location
Grievances
Stakeholder’s Feedback
AICTE Feedback
CAMPUS TOUR
CAREERS
OER Resources
ADMISSION ENQUIRY
IEEE BLENDED LEARNING PROGRAM
Home
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IEEE STUDENT BRANCH
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IEEE BLENDED LEARNING PROGRAM
IEEE BLENDED LEARNING PROGRAM
webadmin
2022-04-30T15:11:50+05:30
IEEE BLENDED LEARNING PROGRAM FOR VLSI
MEMBERS LIST
S.No
Name of the Student
Academic Year
Course Name
Status
1
R.KALIDASAN
2015 - 2016
Logic Design
Completed
2
R.HARIPRASAATH
2015 - 2016
Logic Design
Completed
3
M.HARIHARASUDHAN
2015 - 2016
Logic Design
Completed
4
G.ARUNKUMAR
2015 - 2016
Logic Design
Completed
5
R.MANGAIYARKARASI
2015 - 2016
Logic Design
Completed
6
N.DEEPAMBIKA
2015 - 2016
Logic Design
Completed
7
T.DEEPASRI
2015 - 2016
Logic Design
Completed
8
P.DHARINI
2015 - 2016
Logic Design
Completed
9
M.GOKUL PRIYA
2015 - 2016
Logic Design
Completed
10
V.SRIDHAR
2015 - 2016
Logic Design
Completed
11
M.THAMARAI KANNAN
2015 - 2016
Logic Design
Completed
12
S.SARAVANAN
2015 - 2016
Logic Design
Completed
13
S.KANIMOZHI
2015 - 2016
Logic Design
Completed
14
G.KEERTHI
2015 - 2016
Logic Design
Completed
15
M.DIVYA
2015 - 2016
Logic Design
Completed
16
B.GOWSITHA
2015 - 2016
Logic Design
Completed
17
K.BHUVANESHWARI
2015 - 2016
Logic Design
Completed
18
B.ABIRAMI
2015 - 2016
Logic Design
Completed
19
M.NAGADHARANI
2015 - 2016
Logic Design
Completed
20
S.S.SOWNDHARYA LAKSHMI
2015 - 2016
Logic Design
Completed
21
M.PUNITHA
2015 - 2016
Logic Design
Completed
22
P.VIJAYA LAKSHMI
2015 - 2016
Logic Design
Completed
23
S.HEMA
2015 - 2016
Logic Design
Completed
24
E.PRIYA
2015 - 2016
Logic Design
Completed
25
K.K.RANJITH
2015 - 2016
Logic Design
Completed
26
K.VENUSANKARAN
2015 - 2016
Logic Design
Completed
27
G.GOKUL
2015 - 2016
Logic Design
Completed
28
M.ABINAYA
2015 - 2016
Logic Design
Completed
29
P.SURESHBABU
2015 - 2016
Static Timing Analysis for VLSI Engineers
Completed
30
P.MOHAN
2015 - 2016
Static Timing Analysis for VLSI Engineers
Completed
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